Semiconductor integrated circuits used in portable electronic equipment such as portable phones include a step-down converter circuit for lowering a voltage from a lithium secondary battery to a standard power supply voltage applicable to integrated circuits such as a microcomputer, a memory, a radio circuit, etc. Examples of such a step-down converter circuit include a switching regulator (i.e., DC-DC converter), an LDO (i.e., low drop out) regulator, etc. In the case of the voltage of a lithium secondary battery being 4 V and the operating voltage of a microcomputer being 1 V, a step-down converter circuit may be configured to receive an input voltage (VIN) of 4 V and to produce an output voltage (VOUT) of 1 V.
In recent years, efforts have been directed to the development of technologies such as energy harvesting that allow electronic equipment to operate with small electronic power extracted from the surrounding environment by utilizing environment power generation devices. Power generated by an energy harvester typically fluctuates depending on the ambient conditions. A photovoltaic cell for converting solar light into electrical power, for example, has the power generation capacity thereof fluctuating depending on the hour and the weather conditions. In order to operate electronic equipment in a stable manner, it is thus preferable to accumulate power generated by an energy harvester in a storage device such as a lithium secondary battery or the like and to operate electronic equipment with the power retrieved from the storage device. In a preferable configuration, the fluctuating voltage of the energy harvester may be supplied as an input voltage VIN to a step-down converter circuit. The step-down converter circuit regulates the output voltage VOUT to keep this voltage within the range of the standard power supply voltage of the storage device while charging the lithium secondary battery or the like. A step-down converter circuit may be used in the situation in which the condition of VIN>VOUT is not guaranteed. In some cases, the voltage condition of VIN<VOUT may occur.
FIG. 1 is a drawing illustrating a problem arising when the condition of VIN<VOUT occurs with respect to a conventional step-down converter circuit. A conventional switching regulator has a PMOS transistor situated between the input terminal (i.e., power supply terminal) and the output terminal, and also has an NMOS transistor between the output terminal and the ground. An LDO regulator has a PMOS transistor between the input terminal (i.e., power supply terminal) and the output terminal. FIG. 1 illustrates the structure of a PMOS transistor that is disposed between the input terminal (i.e., power supply terminal) and the output terminal of a switching regulator or an LDO regulator.
The PMOS transistor includes a p-type substrate 10, an n-well 11, an n-well 12, a source (p-type diffusion layer) 13, a drain (p-type diffusion layer) 14, and a gate 15. The input voltage (power supply voltage) VIN is applied to the n-wells 11 and 12 and to the source 13. Further, the voltage of the drain 14 serves as the output voltage VOUT.
The input voltage applied to a conventional step-down converter circuit may drop below the output voltage thereof. Namely, the condition of VIN<VOUT may occur. In such a case, the pn-junction diode between the drain 14 and the back gate (i.e., n-well 12) becomes conductive, so that the electric charge accumulated in the VOUT is discharged toward VIN through this diode. It may further be noted that the gate 15 is coupled to the highest potential, i.e., VIN, in order to ensure the nonconductive state of the PMOS transistor. In the case of VIN<VOUT, however, the gate voltage (i.e., VIN) is lower than the drain voltage (i.e., VOUT), so that electric charge is discharged from VOUT to VIN through a channel formed between the drain 14 and the source 13. In this manner, the condition of VIN<VOUT causes electric current to flow back from VOUT to VIN, thereby creating a risk of discharging the accumulated electric charge of a lithium secondary battery or the like.
The following mechanisms may thus be desired in the step-down converter circuit coupled to a power supply voltage that fluctuates as in the case of energy harvesting. A desired mechanism prevents electric current from flowing back from the output side to the input side or from the output side to the ground through a transistor or a control circuit that controls whether to turn on or off the transistor, even when the condition of VIN<VOUT occurs. Further, a desired mechanism ensures the reliable operation of the control circuit, thereby preventing the operation of the control circuit from becoming unstable due to a drop in the power supply voltage, even when the condition of VIN<VOUT occurs.
FIG. 2 is a drawing illustrating an example of the power supply unit that has a reverse-flow preventing mechanism for preventing reverse-flow current. This power supply unit relates to the disclosures of Patent Document 1. In this circuit, an error amplifier 133 detects an occurrence of the condition of VIN<VOUT to turn off a transistor M6 and turn on transistors M7 and M8. The “off” state of M6 breaks the path through which reverse-flow current occurs from the drain of the transistor M1 to VIN through the back gate. The “on” state of M7 couples the gate of the transistor M1 to VOUT being a higher potential, thereby preventing a channel from being formed between the drain and the source. Further, the “on” state of M8 turns off transistors M2 and M3 to power down the error amplifier 133.
Due to the fact that the power voltage of the error amplifier 133 is VIN, however, the fluctuation of VIN may cause the operation of the error amplifier 133 to become unstable. VIN situated in the voltage range (e.g., below 1 V) in which the error amplifier 133 does not properly operate may result in failure to ensure the reliable control of the transistors M6 through M8. Further, the configuration illustrated in FIG. 2 may end up allowing electric current to leak from VOUT to the ground through the transistor M8, the transistor M5, and a current source 141.
Study has also been made with respect to configurations in which the back gate and the gate of a transistor are coupled to VOUT in response to detecting the condition of VIN<VOUT, thereby preventing reverse-flow current from VOUT to VIN (see Patent Documents 2 through 5, for example). The configuration relating to the disclosures of Patent Document 2 has circuits such as a comparator thereof coupled to a power supply voltage VIN. A drop in VIN (e.g., dropping below 1 V) may result in failure to ensure the reliable “on/off” control of transistors. Further, there may be a possibility of electric current leaking from VOUT to the ground through the control circuit.
With respect to the configuration relating to the disclosures of Patent Document 3, it is not clear as to where the power supply of a reverse-flow detecting circuit is connected to. It may not be clear as to whether the reverse-flow detecting circuit operates in a stable manner in the case of the dropping of VIN below 1 V, for example. Further, since the power supply VIN is applied to part of the reverse-flow detecting circuit, such a configuration may result in failure to ensure the reliable outputting of a control signal to a transistor or the like.
The configuration relating to the disclosures of Patent Document 4 has an error amplifier whose power supply is coupled to VIN. A drop of VIN (e.g., dropping below 1 V) may thus give rise to a possibility of electric current flowing back from VOUT to VIN through a back gate from the drain of the PMOS transistor situated at the output stage of the error amplifier.
The configuration relating to the disclosures of Patent Document 5 has two diodes whose anodes are coupled to VIN and VOUT, respectively, and whose cathodes are coupled to each other to serve as electric power applied to a control circuit inclusive of a comparator. This arrangement may prevent reverse-flow current through the control circuit. However, the power supply voltage of the driver for controlling an output transistor is also lowered due to a voltage drop by the diodes, thereby giving rise to a problem in that the electric power conversion efficiency of the power supply circuit (i.e., ratio of power consumption to power supply) may deteriorate.
[Patent Document 1] Japanese Laid-open Patent Publication No. 2006-228027
[Patent Document 2] Japanese Laid-open Patent Publication No. 2007-316954
[Patent Document 3] Japanese Laid-open Patent Publication No. 2009-301209
[Patent Document 4] Japanese Laid-open Patent Publication No. 2011-65634
[Patent Document 5] Japanese Laid-open Patent Publication No. 2008-21166